Interested in processor architectures, gateware design?
Coreblocks is looking for new contributors!
It is a modular RISC-V out-of-order processor, written in Amaranth (a powerful python-based HDL) and our transactional hardware library, making it a rather unique design.
Our teams dream goal is a fully open-source, usable processor, manufactured in the EU - and you can be part of it!
Larger contributions are planned to be funded from the Coreforge Foundation, starting in next months.
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Coreblocks is a project with a well established, functional base (running Doom on Linux now ;) ), however with many interesting core mechanics and features still left to implement, and a potential for conducting research.
Take a look at our repository https://github.com/kuznia-rdzeni/coreblocks and the roadmap to silicon prototypes https://kuznia-rdzeni.org/a/stage2-roadmap.html to get a sense of a future development.
We are happy to help you getting involved.
Smaller contributions, including non-gateware ones are welcome too.
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