you know what the most cursed thing is about riscv? the assembly format lacks semantic consistency.

this is how they write the load and store instructions:

lw a0, 4(sp)
sw a0, 4(sp)

the first one loads a word from the memory address sp+4 into register a0. the second one stores the word from register a0 into the memory address sp+4. so the first one assigns right to left, and the second assigns left to right.

cursed.