Thinking about how to build a development platform for emulating old hard drive interfaces. They are often 5V but vary in how many pins are push-pull vs open-drain. If I use https://assets.nexperia.com/documents/data-sheet/74LV1T126.pdf, I can do voltage translation on both inputs and outputs and tri-state the output. But that's 3 pins (1 input, 1 output, 1 output enable) per bus pin. For a 50-pin bus (looking at CDC CMD), that's 150 pins needed on an FPGA. Doable but expensive.