i think i've discovered something really ironic

so, SPI NOR flash standardization is awful. every vendor does literally whatever they want at all times and then JEDEC comes a year or two later, writes it down, and host controllers have to deal with it

SPI NAND flash does not have such a "standards" body. there is self-description data but it's just the ONFI NAND stuff describing geometry, with no references to the command set.

as a result, vendors (seemingly) are under pressure to actually be compatible with each other, and the instruction set is quite interchangeable between devices. perhaps not completely (i haven't mapped enough of them yet), but to a much greater extent than SPI NOR flash